Sr Advanced FPGA/ASIC Verification Engineer - UVM (Remote)

Company: Honeywell
Location: Garland
Posted on: June 24, 2022

Job Description:

Hello, I hope you are doing well, I am Ravi from Honeywell Staffing. This is in regards to a full time job opportunity with Honeywell, please go through the below details and let me know if you are interested. Also, if someone in your network is a good fit for this role, please send us their contact information, we would love to speak to them. Link to Apply: https://careers.honeywell.com/us/en/job/HRD166470/Lead-ASIC-Design-Engineer?utm_source=RaviB_LIRJob Title: Sr Advanced FPGA/ASIC Verification Engineer - UVM (Remote) Location: Remote Job Type: Full Time Must Have:

• Bachelor's degree in Engineering
• US Citizenship Only - No Dual Citizenship allowed
• 5+ years System Verilog working experience
• 5+ years' experience with Universal Verification Methodology (UVM) & tools
• Some travel within US/International may be required
  We Value:
  • Bachelor's degree in Electrical or Computer Engineering
  • Ability to get secret clearance
  • Good communication skills (verbal and written)
  • Self-starter, motivated and takes initiative and able to work independently
  • Strong technical problem-solving skills
  • Cyber security background
    Key responsibilities:
    • FPGA/ASIC Verification using Universal Verification Methodology (UVM). Developing verification testbench architecture & design, verification test cases, Simulation testbench coding, testbench procedures and tracing, simulation analysis, and verification results documentation.
    • Some travel within US/International may be required
      
      Ravi Battu Sourcing Specialist Honeywell - Talent Acquisition Office: 781-213-1629 Email: B.Ravi.Raja@honeywell.com Visit Honeywell on LinkedIn - Twitter - Facebook - Web

Keywords: Honeywell, Garland , Sr Advanced FPGA/ASIC Verification Engineer - UVM (Remote), Engineering , Garland, Texas