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Remote ASIC Verification Engineer

Company: Jobot
Location: Garland
Posted on: August 8, 2022

Job Description:

Mid size startup, Series C funding, working on Autonomous AI chips/ image processing for cars. Great salary, benefits, and Equity options.

This Jobot Job is hosted by Barrett Davis

Are you a fit? Easy Apply now by clicking the "Apply" button and sending us your resume.

A Bit About Us

Based in San Jose, CA, we are the #1 leading developer of state-of-the-art camera video processors! We have been named the design company of 2018 by Semiconductor TODAY magazine for the automotive and consumer industries. Backed by over 120 patents we have invested in our long-term success by committing to the development of the future, big-name clients such as Lexus, Audi, and Ferrari.

Why join us?

  • Competitive Base Salary
  • Extremely Competitive Full Benefits Package
  • Flexible Work Schedules
  • Accelerated Career Growth
    Equity options

    Job Details

    ASIC Verification Engineer, UVM from existing or scratch, System Verilog

    Onsite in San Jose California, or Toronto Canada.

    Full Job Description Is Below.

    Develop test strategies to verify next-generation camera processors

    Develop and review block and chip-level verification environments and test plans

    Work closely with design engineers to develop test benches and test plans to meet coverage goals

    Participate in selecting best in class 3rd party protocol verification IP

    Help enhance the overall DV methodology by analyzing 3rd party verification tools

    Debug failures in simulation and collaborate with designers in identifying root-cause issues

    Develop a tests that will help achieve functional safety goals that meet ISO26262 compliance

    Work with the systems and software teams on emulation platforms

    Participate in the bring-up and debug of the device prototype

    Provide support to the Product Engineering team to meet all validation and qualification goals for the product

    Minimum Qualifications


    5 years of industry experience in design verification

    Experience with test planning, test bench architecture, and assertions

    Constrained random verification experience with SystemVerilog using UVM

    Coverage driven verification (code/functional/assertion coverage)

    Strong programming skills in C/C++ and scripting experience with Python/Tcl/Perl

    Interested in hearing more? Easy Apply now by clicking the "Apply" button.

Keywords: Jobot, Garland , Remote ASIC Verification Engineer, Engineering , Garland, Texas

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